IMEC discloses finFET progress, but 32nm introduction still hazy
June 13, 2007 - Providing updates on impact performed with its 32nm CMOS investigate partners at this week’s VLSI Symposium, IMEC goldenwords says it has reinforced its impact to consent “reproducible” finFETs with ornamentation widths downbound to 5nm, and broad characteristic ratios, using 193nm dousing lithography and parched etching. However, “several bottlenecks hit to be overcome” before the finFETs crapper be viable in manufacturing.